ارائه مسیریاب چهاردرگاهی بدون انسداد در شبکه‌های نوری روی تراشه تلفیقی جهت کاهش پارامتر اتلاف

نوع مقاله : علمی-پژوهشی

نویسندگان

1 گروه مهندسی کامپیوتر- دانشگاه آزاد اسلامی واحد علوم و تحقیقات

2 مرکز تحقیقات مخابرات ایران- ITRC

3 گروه مهندسی کامپیوتر- دانشگاه آزاد اسلامی واحد شهر قدس

چکیده

با محدود بودن توان مصرفی برروی تراشه برای دستیابی به کارآیی بالا و توان مصرفی کم در یک تراشه، معماری چند پردازنده­ای ارائه شد. در این معماری بیشتر توان مصرفی به اتصالات روی تراشه تعلق دارد قابلیت اتصالات نوری برای کاهش توان مصرفی و افزایش کارآیی، معماری جدیدی با عنوان شبکه نوری روی تراشه پیشنهاد می­کند که قادر است از مزایای سیگنال­ها و عناصر نوری برای انتقال داده استفاده کند. در این مقاله یک مسیریاب نوری 4×4 بدون انسداد معرفی شده است که هدف آن بهبود پارامترهای لایه­ی فیریکی در نتیجه افزایش پارامترهای کارایی شبکه­های نوری است. مسیریاب پیشنهادی با سه مسیریاب اورجینال، مسیرمستقیم و متقارن از نظر اتلاف سیگنال نوری و توان مصرفی مقایسه شده است، براساس نتایج بدست آمده، به عنوان نمونه در همبندی توری، بیشینه اتلاف در مسیریاب پیشنهادی در مقایسه با مسیریاب اورجینال برای چهار کاربرد GTC, Cactus ,Tornado , MADbench  به ترتیب دارای 28.22٪، 24.46٪، 28.72٪ و 29.20٪ بهبود است. نتایج شبیه­سازی نشان می­دهد مسیریاب ارائه شده در مقایسه با سه مسیریاب دیگر سبب کاهش اتلاف سیگنال نوری و توان مصرفی در شبکه نوری روی تراشه می­شود، که ارزیابی مسیریاب پیشنهادی با استفاده از شبیه­ساز PhoenixSim انجام می­شود.

کلیدواژه‌ها

عنوان مقاله [English]

Four-port non-blocking switch for reducing insertion loss in hybrid photonic networks-on-chip

نویسندگان [English]

  • S. Khoroush 1
  • M. Reshadi 1
  • A. Khademzadeh 2
  • A. Reza 3
1 Department of Computer Engineering, Science and Research Branch Islamic Azad University, Tehran, Iran
2 Iran Telecommunication Research Center, ITRC, Tehran, Iran,
3 Department of Computer Engineering, Shahr-e-Qods Branch Islamic Azad University, Tehran, Iran,
چکیده [English]

A multi-processor architecture was proposed to address power consumption limitations in chips in order to increase performance and lower power consumption. In this architecture, the highest power consumption comes from the chip connections. Optical connections can reduce power consumption and increase performance via a new architecture called photonic network-on-chips, which are capable of utilizing the benefits of optical signals and elements for data transfer. This paper proposes a 4×4, non-blocking photonic switch to improve physical layer parameters by increasing photonic network performance. The insertion loss and energy dissipation of the proposed switch were compared to three switches: Original, StraightPath, and Symmetric switches. The results indicated that, in a mesh topology, the proposed switch reduced loss for the GTC, Cactus, Tornado, and MADbench by 28.22, 24.46, 28.72, and 29.20%, respectively, when compared to the Original switch. According to PhoenixSim simulation results, the proposed switch reduced insertion loss and energy dissipation in photonic network-on-chips when compared to the three comparison switches.

کلیدواژه‌ها [English]

  • Photonic network-on-chip
  • switch
  • insertion loss
  • energy dissipation

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