بررسی عملکرد مالتی‌پلکسر سه ارزشی مبتنی بر ترانزیستورهای اثر میدان نانولوله کربنی

نوع مقاله : علمی-پژوهشی

نویسندگان

دانشکده مهندسی برق و کامپیوتر - دانشگاه کاشان

چکیده

با توجه به کاهش مقیاس قطعات نیمه‌هادی و مدارات مجتمع تا میزان محدوده نانومتر، صنعت نیمه‌هادی با چالش‌های زیادی روبرو خواهد بود. ترانزیستورهای مبتنی بر نانولوله‌های کربنی به‌دلیل ابعاد بسیار کم، سرعت بالا و مصرف کم‌توان و همچنین به‌خاطر مشابه‌بودن عملکردشان با CMOS توجه طراحان مدارهای منطقی و سیستم دیجیتالی را جلب کرده‌اند. استفاده از منطق چند-ارزشی (MVL) به‌دلیل کاهش عملیات ریاضی، موجب کاهش سطح تراشه و کاهش توان مصرفی در مقایسه با منطق دو ارزشی می‌شود. در این مقاله یک طراحی جدید از مالتی‌پلکسر با منطق سه‌ارزشی مبتنی‌بر ترانزیستورهای اثر میدان نانولوله کربنی (CNTFET) ارائه شده است. در نهایت، یک مقایسه از لحاظ توان و عملکرد مالتی‌پلکسر سه‌ارزشی CNTFET در برابر مالتی‌پلکسر سه‌ارزشی خانواده CMOS که طراحی آن نیز در این مقاله انجام شده، ارائه شده است. در ادامه نتایج شبیه‌سازی که با بهره‌گیری از نرم‌افزار HSPICE در تکنولوژی 32 نانومتر به‌دست آمده ارائه گردیده است. نتایج شبیه‌سازی بهبود 60% تا 65% در مقدار تأخیر، %96.4 تا 98% در مقدار توان مصرفی و تقریباً 99% در مقدار انرژی مصرفی مدار مالتی‌پلکسر سه ارزشی مبتنی‌بر CNTFET را نسبت به مدار مشابه مبتنی بر CMOS پیشنهادی نشان می‌دهد. همچنین PDP به‌میزان 99% بهبود می‌یابد.

کلیدواژه‌ها

عنوان مقاله [English]

Performance Evaluation of a Carbon Nanotube FET-based Ternary Multiplexer

نویسندگان [English]

  • E. Nikbakht Bidgoli
  • D. Dideban
Faculty of Electrical and Computer Engineering, University of Kashan, Kashan, Iran
چکیده [English]

Due to shrinking semiconductor device and integrated circuit dimensions into nanometer regime, semiconductor industry is facing challenging problems. Transistors based on carbon nanotubes have attracted attention among logic circuit and digital system designers due to their low dimensions, high speed, low power consumption and similarity of their performance with CMOS transistors. Using Multiple Valued Logic (MVL) causes reduction in both chip area and power consumption in comparison with binary logic due to less mathematical functions. In this paper, we proposed a novel design for a multiplexer with ternaty logic using Carbon Nanotube Field Effect Transistors (CNTFETs). Eventually a comparison has been made between power and performance of this CNTFET based ternary multiplexer and its ternary counterpart in CMOS which is designed in this paper. In continue, the simulation results are presented in 32 nm technology node using HSPICE. The obtained results show between 60% to 65% improvement in latency, between 96.4% to 98% improvement in power consumption and 99% improvement in enery consumption of ternary multiplexer based on CNTFET in respect to its counterpart in CMOS. Moreover, Power Delay Product (PDP) is improved by 99%.

کلیدواژه‌ها [English]

  • Carbon nanotube field effect transistor (CNTFET)
  • Multiplexer
  • Multiple-valued logic (MVL)
  • Ternary logic
  • Carbon nanotube

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