طراحی یک مدار ضرب‌کننده آنالوگ برمبنای حلقه translinear در حالت جریان با توان مصرفی پایین و دقت بالا

نوع مقاله : علمی-پژوهشی

نویسندگان

1 باشگاه پژوهشگران جوان و نخبگان - واحد ارومیه - دانشگاه آزاد اسلامی

2 گروه مهندسی برق- واحد ارومیه- دانشگاه آزاد اسلامی

چکیده

در این مقاله یک مدار ضرب‌کننده CMOS آنالوگ چهار ربع جدید در حالت جریان که مبتنی بر دو جفت حلقه translinear دوگان می‌باشد ارائه می‌گردد. ویژگی‌های مهم مدار عبارتند از پهنای باند بالا، توان مصرفی کم و آزادبودن از اثر بدنه،که علت اصلی آن دوگان بودن مدار به این صورت که در هر حلقه translinear دوگان از دو NMOS و دو PMOS استفاده شده است. علاوه‌بر این، اعوجاج هارمونیک ناشی از ناهمگونی در سیگنال‌های ورودی (IX , IY)، پارامترهای هدایت انتقالی(K)  و ولتاژ آستانه (Vth) مورد بحث قرار گرفته است که نتایج حاکی از این است که مدار در برابر ناهمگونی بسیار مقاوم می‌باشد. به‌منظور بررسی عملکرد درست مدار ضرب‌کننده، از آن در دو کاربرد پراستفاده یعنی مدولاتور دامنه و دو برابرکننده فرکانس استفاده شده است که نتایج شبیه‌سازی آن ارائه شده است. این مدار با استفاده از شبیه ساز HSPICE با مدل TSMC مرحله 49 (BSIM3v3) در تکنولوژی 0.18 میکرومتر استاندارد CMOS طراحی و شبیه سازی شده است. که نتایج حاکی از خطای غیرخطی 0.62 درصد، اعوجاج هارمونیک کل 1/1 در فرکانس 1 مگا هرتز، پهنای باند 1.15 گیگا هرتز و حداکثر توان مصرفی 93.7 میکرو وات می‌باشد.

کلیدواژه‌ها

عنوان مقاله [English]

A New Highly Accurate Translinear Based CMOS Multiplier in Current Mode with Low Power Dissipation

نویسندگان [English]

  • T. Aghaei 1
  • A. Naderi 2
1 Young researchers and elite club, Urmia Branch, Islamic Azad University, Urmia, Iran
2 Department of Electrical-Electronics Engineering Urmia Branch, Islamic Azad University, Urmia, Iran
چکیده [English]

This paper deals with a new strategy for design of analog multiplier which operates in four quadrant. The proposed circuit employs the dual translinear principle with composition of NMOS and PMOS transistors, simultaneously. The important achievements of the circuit are its wide bandwidth, low power consumption as well as the body effect free performance. In order to demonstrate efficiency of the circuit, harmonic distortion analysis due to the mismatch in input signals (IX , IY), transconductance parameters (K) and threshold voltage (Vth) are discussed in detail, and the obtained relations verify the simulation results and indicate the robustness of the circuit in the presence of mismatch. Also, to validate the circuit performance, it is used in two useful applications of amplitude modulator and frequency doubler, and the simulation results of them are presented. Additionally, the Monte Carlo analysis for transistor parameters as well as the temperature variation results demonstrate stable performance of the circuit. This circuit is designed and simulated using HSPICE software with TSMC and level 49 parameters (BSIM3v3) in 180nm technology. The simulation results demonstrate a linearity error of 0.69%, a THD of 1.05% in 1MHz, a -3dB bandwidth of 1.17GHz and a maximum power consumption of 93µW.  

کلیدواژه‌ها [English]

  • Analog multipliers
  • translinear loop
  • body effect
  • four-quadrant
  • power consumption
  • bandwidth

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