تقویت‌کننده چاپر کم نویز و توان پایین با نسبت رد حالت مشترک 130 دسی‌بل و نسبت سیگنال به نویز بالا

نوع مقاله : علمی-پژوهشی

نویسندگان

1 Faculty of Electrical Engineering, Sahand University of Technology, Sahand New Town, Tabriz, Iran.

2 استاد/دانشگاه سهند تبریز

چکیده

در این مقاله یک تقویت‌کننده چاپر با نویز کم و توان کم برای پردازش سیگنال‌های بیوپتانسیل ارائه شده است. برای دستیابی به نسبت رد حالت مشترک و نسبت سیگنال به نویز بالا از یک ساختار دو طبقه ای استفاده شده است. این طبقات شامل یک توپولوژی کسکود تاشده برای دستیابی به نویز ورودی کم و امپدانس ورودی بزرگ و یک بخش کسکود تاشده دوطبقه متقاطع برای تامین نیازمندی های نسبت رد حالت مشترک و نسبت سیگنال به نویز است. ساختار پیشنهادی حدود 1.27 میکرووات توان از یک منبع ولتاژ 0.6 ولت مصرف می‌کند. اندازه پارامترهای مدار شامل نسبت رد حالت مشترک، نسبت سیگنال به نویز، بهره و نویز موثر ارجاع شده به ورودی به ترتیب 133 دسی‌بل، 121.4 دسی‌بل، 38 دسی‌بل و 930 نانوولت در پهنای باند 0.01 کیلوهرتز تا 1 کیلوهرتز هستند. پارامترهای ضریب بهره وری نویز و ضریب بهره وری توان به ترتیب 1.8 و 1.9 محاسبه شده است و امپدانس ورودی 2.5 گیگا اهم در فرکانس چاپینگ 2 کیلوهرتز است.

کلیدواژه‌ها

موضوعات


عنوان مقاله [English]

A Low-Noise Low-Power Chopper Amplifier With 130dB CMRR and High SNR

نویسندگان [English]

  • M. Forghani 1
  • H. Faraji Baghtash 2
1 Faculty of Electrical Engineering, Sahand University of Technology, Sahand New Town, Tabriz, Iran.
2 Faculty of Electrical Engineering, Sahand University of Technology, Sahand New Town, Tabriz, Iran.
چکیده [English]

This paper presents a low-power and low-noise chopper amplifier for biopotential signals. A two-stage structure is presented to achieve a high CMRR and SNR. These stages contain a folded cascode topology to obtain a low input noise and large input impedance; and a stage of two stacked cross-coupled folded cascode for CMRR and SNR intents. The structure consumes 1.27 µW from a 0.6 V power supply. The CMRR, SNR, Gain, and input-referred noise RMS respectively are 133 dB, 121.4 dB, 38 dB and 930nV/Hz in the Bandwidth of 0.01 kHz to 1 kHz. The NEF and PEF are 1.8 and 1.9 and input impedance is 2.5 GΩ with chopping frequency of 2kHz.

کلیدواژه‌ها [English]

  • Chopper amplifier
  • low noise
  • low power
[1] Mondal, S., & Hall, D. A. (2017, May). An ECG chopper amplifier achieving 0.92 NEF and 0.85 PEF with AC-coupled inverter-stacking for noise efficiency enhancement. In 2017 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1-4). IEEE.
[2] Bijari, A., & Sheikhi, M. (2019). A 3.1-10.6 GHz Ultra-Wideband Low Noise Amplifier with Novel Input Matching Network. TABRIZ JOURNAL OF ELECTRICAL ENGINEERING, 49(2), 517-529.
[3] Xu, J., Yazicioglu, R. F., Grundlehner, B., Harpe, P., Makinwa, K. A., & Van Hoof, C. (2011). A $160~\mu {\rm W} $8-Channel Active Electrode System for EEG Monitoring. IEEE Transactions on Biomedical circuits and systems, 5(6), 555-567.
[4] Nevalainen, T., Koivisto, T., & Pänkäälä, M. (2014, October). Subthreshold nano-watt front-end amplifier for wireless ECG applications. In 2014 NORCHIP (pp. 1-4). IEEE.
[5] Bai, W., & Zhu, Z. (2016). A 0.5-V power-efficient low-noise CMOS instrumentation amplifier for wireless biosensor. Microelectronics Journal, 51, 30-37.
[6] Fiori, F. (2016). On the susceptibility of chopper operational amplifiers to EMI. IEEE Transactions on Electromagnetic Compatibility, 58(4), 1000-1006.
[7] Steyaert, M. S., & Sansen, W. M. (1987). A micropower low-noise monolithic instrumentation amplifier for medical purposes. IEEE journal of solid-state circuits, 22(6), 1163-1168.
[8] Song, S., Rooijakkers, M., Harpe, P., Rabotti, C., Mischi, M., van Roermund, A. H., & Cantatore, E. (2015). A low-voltage chopper-stabilized amplifier for fetal ECG monitoring with a 1.41 power efficiency factor. IEEE.
transactions on biomedical circuits and systems, 9(2), 237-247.
[9] Majidzadeh, V., Schmid, A., & Leblebici, Y. (2011). Energy efficient low-noise neural recording amplifier with enhanced noise efficiency factor. IEEE Transactions on biomedical circuits and systems, 5(3), 262-271.
[10] Chen, Y. P., Blaauw, D., & Sylvester, D. (2014, June). A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording. In 2014 Symposium on VLSI Circuits Digest of Technical Papers (pp. 1-2). IEEE.
[11] Vejdani, P., & Nabki, F. (2019). Dual-path and dual-chopper amplifier signal conditioning circuit with improved SNR and ultra-low power consumption for MEMS. IEEE Transactions on Circuits and Systems I: Regular Papers, 66(6), 2253-2262.
[12] Hosseinisharif, S., Pourahmadi, M., & Shayesteh, M. R. (2021). An Active, Low-Power, 10Gbps, Current-based Transimpedance Amplifier in a Broadband Optical Receiver Front-End. TABRIZ JOURNAL OF ELECTRICAL ENGINEERING, 51(1), 49-60.
[13] Pokamisas, S., Baxevanakis, D., & Sotiriadis, P. P. (2019, May). A 0.6 V, 700nW Chopper Capacitively-Coupled Instrumentation Amplifier for Biomedical Applications. In 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST) (pp. 1-4). IEEE.
[14] Assaad, R. S., & Silva-Martinez, J. (2009). The recycling folded cascode: A general enhancement of the folded cascode amplifier. IEEE Journal of Solid-State Circuits, 44(9), 2535-2542.
[15] Johns, D. A., & Martin, K. (2008). Analog integrated circuit design. John Wiley & Sons.
[16] Amourah, M. M., & Geiger, R. L. (2001, May). Gain and bandwidth boosting techniques for high-speed operational amplifiers. In ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No. 01CH37196) (Vol. 1, pp. 232-235). IEEE.
[17] Wang, A., Calhoun, B. H., & Chandrakasan, A. P. (2006). Analog Circuits in Weak Inversion. Sub-threshold design for ultra low-power systems (Vol. 95). New York: Springer.
[18] Waltari, M. E., & Halonen, K. A. (2002). Circuit techniques for low-voltage and high-speed A/D converters (Vol. 709). Springer Science & Business Media.
[19] Baxevanakis, D., & Sotiriadis, P. P. (2017, May). A 1.8 V CMOS chopper four-quadrant analog multiplier. In 2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST) (pp. 1-4). IEEE.
[20] Enz, C. C., & Temes, G. C. (1996). Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization. Proceedings of the IEEE, 84(11), 1584-1614.
[21] Chen, H., Zhang, L., & Wang, Y. (2021, May). A 2.8 nV/√ Hz Chopper Amplifier for Bridge Readout with Dual Ripple Reduction and Noise-Nonlinearity-Cancelling Loop. In 2021 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1-4). IEEE.
[22] Kim, H., Kwon, Y., You, D., Choi, H. W., Kim, S. H., Heo, H., ... & Ko, H. (2021). Low-noise chopper amplifier using lateral PNP input stage with automatic base current cancellation. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(7), 2297-2301.
[23] Qu, T., Pan, Q., Zeng, X., Hong, Z., & Xu, J. (2022, April). A 1.8 GΩ-Input-Impedance 0.15 µV-Input-Referred-Ripple Chopper Amplifier with Local Positive Feedback and SAR-Assisted Ripple Reduction. In 2022 IEEE Custom Integrated Circuits Conference (CICC) (pp. 1-2). IEEE.
[24] Pham, X. T., Vu, T. K., Nguyen, T. D., & Pham-Nguyen, L. (2022). A 1.2-µW 41-dB Ripple Attenuation Chopper Amplifier Using Auto-Zero Offset Cancelation Loop for Area-Efficient Biopotential Sensing. Electronics, 11(7), 1149.
[25] Sajja, A., & Rooban, S. (2023). A chopper amplifier with a pseudo-MOS resistor-based tunable bandwidth for EEG applications. Microelectronics International, 40(3), 198-205.