Effects of Energy Band Gap Traps on Drain Current in Tunneling Field Effect Transistors

Document Type : Original Article

Authors

Faculty of Electrical and Computer Engineering, University of Semnan, Semnan, Iran

Abstract

In this paper the impact of the trap assisted tunneling mechanism on the subthreshold characteristics of the tunneling field effect transistors is investigated. It is shown that the trap assisted tunneling is the dominant charge transfer mechanism before the band to band tunneling starts. Employing a modified SRH formalism, we show that, at the room temperature and for the subthreshold voltages, the trap assisted tunneling current always dominates and degrades the switching characteristics of the device which is measured by the subthreshold swing. This approach is applicable to the double gate and the gate-all-around structures where the traps are located in the source-channel tunneling junction. The trap assisted tunneling strongly depends on the electric field and the temperature. The considered transistors in this research are based on the compound semiconductors of groups three and five of periodic table. The effects of various structural parameters and material systems on the trap assisted tunneling current are studied, too. 

Keywords

References

[1]          سید امیر هاشمی˓ «مدل تحلیلی پتانسیل و ولتاژ آستانه ترانزیستور ماسفت دو گیتی با گیت دو ماده ای بدون آلایش»˓ مجله مهندسی برق دانشگاه تبریز˓ دوره 47˓ شماره 4˓ صفحات 1759-1769˓ زمستان 1396.
[2]          مهسا مراد و میثم زارعی˓ «ارائه ساختاری جدید از ترانزیستورهای اثرمیدان در مقیاس نانو به منظور بالا بردن قابلیت اطمینان»˓ مجله مهندسی برق دانشگاه تبریز˓ دوره 48˓ شماره 3˓ صفحات 1399-1404˓ پاییز 1397.
[3]        S. H. Kim, Germanium-Source Tunnel Field Effect Transistors for Ultra-Low Power Digital Logic, Ph.D. Thesis, University of California, Berkeley, 2012.
[4]        T. J. Vasen, Investigation of III-V Tunneling Field-Effect Transistors, Ph.D. Thesis, University of Notre Dame, Indiana, 2014.
[5]        W. E. Spear, P. G. LeComber and A. J. Snell, “An Investigation of the amorphous-silicon barrier and pn junction,” Philosophical Magazine B 38, pp. 303–317, 1978.
[6]        G. Vincent, A. Chantre and D. Bois, “Electric field effect on the thermal emission of traps in semiconductor junctions,” Journal of Applied Physics, vol. 50, no. 8, pp. 5484–5487, 1979.
[7]        P. T. Landsberg, Recombination in Semiconductors, Cambridge Univ. Press, Cambridge, pp. 172–182, 1991.
[8]        J. Y.  Hou, J. K. Arch, S. J. Fonash, S. Wiedeman and M. Bennett, “An examination of the tunnel junctions in triple junction a-Si:H based solar cells: modeling and effects on performance,” Conference Record of the 22nd IEEE, Photovoltaic Specialists Conference, Las Vegas, pp. 1260–1264, 1991.
[9]        J. A. Willemen, M. Zeman and J. W. Metselaar, “Computer modeling of amorphous silicon tandem cells,” Proceedings of the first WCPEC-1, Hawaii, pp. 599–602, 1994.
[10]      H. Xu and Y. Dai, “Two-dimensional analytical model of double-gate tunnel FETs with interface trapped charges including effects of channel mobile charge carriers,” Journal of Semiconductors, vol. 38, no. 2, 2017.
[11]      J. Furlan, “Tunneling generation–recombination currents in a-Si junctions,” Progress in Quantum Electronics, vol. 25, no. 2, pp. 55–96, 2001.
[12]      M. Baudrit, and C. Algora, “Tunnel Diode Modeling, Including Nonlocal Trap-Assisted Tunneling: A Focus on III–V Multi-junction Solar Cell Simulation,” IEEE Transaction on electron devices, vol. 57, no. 10, 2010.
[13]      R. N. Sajjad, W. Chern, J. L. Hoyt and D. A. Antoniadis, “Trap Assisted Tunneling and Its Effect on Subthreshold Swing of Tunnel FETs,” IEEE Transaction on electron devices, vol. 63, no. 11, 2016.
[14]      R. N. Sajjad, U. Radhakrishna and D. A. Antoniadis, “A tunnel FET compact model including non-idealities with Verilog implementation,” Solid State Electronics, vol. 150, pp. 16-22, Dec. 2018.
[15]      S. Mohammadi and H. R. T. Khaveh, “An Analytical Model for Double-Gate Tunnel FETs Considering the Junctions Depletion Regions and the Channel Mobile Charge Carriers,” IEEE Transactions on Electron Devices, vol. 64, no. 3, pp. 5021-5029, Mar. 2017.
TABRIZ JOURNAL OF ELECTRICAL ENGINEERING
Volume 50, Issue 4 - Serial Number 94
March 2021
Pages 1639-1645

Files

Share

How to cite

Statistics