A Testable Full Adder Designing based on Quantum-Dot Cellular Automata on Nanoscale

Editorial

Authors

Department of Computer Engineering, Tabriz Branch, Islamic Azad University, Tabriz, Iran

Abstract

Quantum dot cellular automata (QCA) as an important technology with minimal size, high speed, low latency and power consumption is suitable replacement for semiconductor transistor technology. The growing demand for observability and testability attracts more research on it. A full adder circuit is a basic unit in digital arithmetic and logic circuits. In this paper, a unique structure for testable full adder is presented in QCA. The implementation of the full adder circuit with the structure of the Built In-Self Test (BIST), its observational capabilities and its intermediate component controllability increase the reliability and the test capability of other designed circuits based on this. All of inputs in the proposed have testability and controllability capability and the middle nodes have observability feature. This design in contrast to its counterparts uses three-layer scheme and surpasses the best previous layer designs in terms of area, delay and complexity. The simulation results using QCADesigner software confirmed that the presented circuit works well and can be used as a high-performance design in QCA technology.

Keywords

References

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