Compressors are one of the most critical components of multipliers. Thus, improving this part’s energy consumption, delay, and area can directly affect the systems’ overall efficiency. Also, Magnetic tunnel junction (MTJ) devices have been studied as a prosperous solution to implement low-power circuits thanks to their non-volatility, high speed, low power, good endurance, and scalability. This paper uses MTJs to develop two hybrid MTJ/CMOS low-power designs of a 5-2 compressor. The proposed designs are simulated in the HSPICE simulator using 45nm standard CMOS technology and the spin torque transfer (STT) MTJ model. Finally, the new designs compared with the exiting 5-2 compressors. The proposed circuits improve the delay, PDP, and transistor count compared to the existing design. According to the simulation result, the first and second proposed designs have decreased the PDP value by about 51% and 66%, respectively than the previous work.