A new comparator with FPN noise suppression capability for use in image sensors

Document Type : Original Article

Authors

1 Department of Electrical and Computer Engineering, Islamic Azad University Science and Research Branch, Tehran,Iran

2 urmia university of technology, urmia, iran

3 Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran

Abstract

 
 
Short Abstract
In this paper, a comparator is introduced for use in CMOS image sensor which can suppress the FPN noise of the pixel in addition to comparing voltages. Due to a large number of circuits in the column-parallel image sensors, this technique can help save power, silicon area, and imaging time by merging the noise suppression circuit in the data converter. Simulation results show that the proposed comparator for the input range of 0.7 to 1.7 volts with an accuracy of 1 mV can do the comparison and subtraction in 25 nanoseconds. The total power consumption of the comparator is about 64 microwatts, which has 1.8- & 2.5-volt power supply and removes FPN noise up to the range of 50 mV with good accuracy. Total noise referred to the input of the comparator for the bandwidth of 1 Hz to 1GHz was obtained 500µV. All circuits are designed in 0.18μm CMOS technology and simulated by Specter simulator.

Keywords

References

[1] T. Hirayama, "The evolution of CMOS image sensors", 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2013, pp. 5-8, doi: 10.1109/ASSCC.2013.6690968.
[2] F. Morishita, W. Saito, Y. Iizuka, N. Kato, R. Otake and M. Ito, "A 30.2-µ Vrms Horizontal Streak Noise 8.3-Mpixel 60-Frames/s CMOS Image Sensor With Skew-Relaxation ADC and On-Chip Testable Ramp Generator for Surveillance Camera," in IEEE Journal of Solid-State Circuits, vol. 57, no. 10, pp. 3103-3113, Oct. 2022, doi: 10.1109/JSSC.2022.3176379.
[3] Z. Li, H. Xu, Z. Liu, L. Luo, Q. Wei and F. Qiao, "A 2.17μW@120fps Ultra-Low-Power Dual-Mode CMOS Image Sensor with Senputing Architecture," 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022, pp. 92-93, doi: 10.1109/ASP-DAC52403.2022.9712591.
[4] J. -S. Hyeon, S. -H. Kim and H. -J. Kim, "A Low-Power CMOS Image Sensor With Multiple-Column-Parallel Readout Structure," in IEEE Journal of the Electron Devices Society, vol. 10, pp. 180-187, 2022, doi: 10.1109/JEDS.2022.3148087.
[5] J. Nakamura, "Image Sensors and Signal Processing for Digital Still Cameras", Taylor & Francis, 2006.
[6] Jing Gao, Ningxi Yan, Kaiming Nie, Zhiyuan Gao, Jiangtao Xu, "A 2.44μs row conversion time 12-bit high-speed differential single-slope ADC with TDC applied to CMOS image sensor",Microelectronics Journal,Volume 120,2022,
[7] K. Park, S. Yeom and S. Y. Kim, "Ultra-Low Power CMOS Image Sensor With Two-Step Logical Shift Algorithm-Based Correlated Double Sampling Scheme," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 11, pp. 3718-3727, Nov. 2020, doi: 10.1109/TCSI.2020.3012980.
[8] N. Chen, S. Zhong, M. Zou, J. Zhang, Z.  Ji, L. Yao, "A Low-Noise CMOS Image Sensor with Digital Correlated Multiple Sampling ", IEEE Transactions on Circuits and Systems–I: Regular Papers. 2017.
[9] S. Okura, O. Nishikido, Y. Sadanaga, Y. Kosaka, N. Araki, K. Ueda, F. Morishita, "A 3.7 M-Pixel 1300-fps CMOS Image Sensor with 5.0 G-Pixel/s High-Speed Readout Circuit", IEEE Journal of Solid-State Circuits, Vol. 50, No. 4, 2015.
[10] N. Cottini, M. Gottardi, N. Massari, R. Passerone, Z. Smilansky. "A 33W 64×64 Pixel Vision Sensor Embedding Robust Dynamic Background Subtraction for Event Detection and Scene Interpretation", IEEE Journal of Solid-State Circuits, Vol. 48, No. 3, 2013.
[11] L. Gaioni et al., "Optimization of the 65-nm CMOS Linear Front-End Circuit for the CMS Pixel Readout at the HL-LHC," in IEEE Transactions on Nuclear Science, vol. 68, no. 11, pp. 2682-2692, Nov. 2021, doi: 10.1109/TNS.2021.3117666.
[12] صادق کلانتری، علی‌محمد فتوحی، «حذف نویز ضربه از تصاویر طبیعی دیجیتال در محدوده وسیعی از چگالی نویز مبتنی بر فیلتر میانگین و میانه تطبیقی»، مجله مهندسی برق دانشگاه تبریز، دوره 47، شماره 2، صفحه 677-686، 1396.
[13] D. Roma et al. "APS fixed pattern noise modelling and compensation", 2016 Conference on Design of Circuits and Integrated Systems (DCIS), 2016, pp. 1-5, doi: 10.1109/DCIS.2016.7845363.
[14] Guicquero W, Alacoque L. "Impact of fixed pattern noise on embedded image compression techniques". 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, pp. 1-4, doi: 10.1109/ISCAS.2017.8050547.
[15] Q. Zhang, N. Ning, J. Li, Q. Yu, K. Wu, Z. Zhang, "A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors" IEEE Access, vol. 8, pp. 172467-172480, 2020, doi: 10.1109/ACCESS.2020.3025153.
[16] S. Xie, A. Theuwissen, "A 10 Bit 5 MS/s Column SAR ADC With Digital Error Correction for CMOS Image Sensors", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 6, pp. 984-988, June 2020, doi: 10.1109/TCSII.2019.2928204.
[17] H. Lee, D. Seo, W. Kim, B. Lee "A Compressive Sensing-Based CMOS Image Sensor With Second-Order ΣΔ ADCs", IEEE Sensors Journal, vol. 18, no. 6, pp. 2404-2410, 15 March15, 2018, doi: 10.1109/JSEN.2017.2787122.
[18] J. -Y. Jeong, J. Shim, S. -K. Hong and O. -K. Kwon, "A High-Speed and Energy-Efficient Multi-Bit Cyclic ADC Using Single-Slope Quantizer for CMOS Image Sensors," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2322-2326, July 2021, doi: 10.1109/TCSII.2021.3062139.
[19] مهدی حسین‌نژاد،  حسین شمسی، «طراحی و شبیه‌سازی مبدل آنالوگ به دیجیتال لوله‌ای مبتنی بر مقایسه‌گر ولتاژ پایین»، مجله مهندسی برق دانشگاه تبریز، دوره 46، شماره 1، صفحه 87-98، 1395.
[20] H-J. Kim "11-bit Column-Parallel Single-Slope ADC With First-Step Half-Reference Ramping Scheme for High-Speed CMOS Image Sensors", IEEE Journal of Solid-State Circuits, vol. 56, no. 7, pp. 2132-2141, July 2021, doi: 10.1109/JSSC.2021.3059909.
[21] J. Wei, X. Li, L. Sun, D. Li, "A 63.2μW 11-Bit Column Parallel Single-Slope ADC with Power Supply Noise Suppression for CMOS Image Sensors", 2020 IEEE International Symposium on Circuits and Systems 2020, pp. 1-4, doi: 10.1109/ISCAS45731.2020.9180739.
[22] M. R. Elmezayen, B. Wu, S. U. Ay "Single-Slope Look-Ahead Ramp ADC for CMOS Image Sensors", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 12, pp. 4484-4493, Dec. 2020, doi: 10.1109/TCSI.2020.3007882.
[23] روح اله صنعتی، فرزان خطیب،  محمد جوادیان صراف، ریحانه کاردهی مقدم، «مقایسه‌کننده حوزه زمان بالک-درایو با بهره ولتاژ به زمان بالا و توان مصرفی پایین»، مجله مهندسی برق دانشگاه تبریز، دوره 51 ، شماره 4، صفحات 393-401، 1401.
[24] M. Teymouri, J. Sobhi, "An ultra-linear CMOS image sensor for a high-accuracy imaging system", Int J Circ Theor Appl, 2018; 46: 1593– 1605. https://doi.org/10.1002/cta.2485.
[25] I. Park, C. Park, J. Cheon and Y. Chae, "5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise", 2019 IEEE International Solid-State Circuits Conference 2019, pp. 100-102, doi: 10.1109/ISSCC.2019.8662388.
[26] Q. Liu, A. Edward, M. Kinyua, E. G.  Soenen and J. Silva-Martinez, "A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques", IEEE Journal of Solid-State Circuits, vol. 52, no. 6, pp. 1591-1604, June 2017, doi: 10.1109/JSSC.2017.2661843
[27] T. Arai et al., "6.9 A 1.1µm 33Mpixel 240fps 3D-stacked CMOS image sensor with 3-stage cyclic-based analog-to-digital converters", 2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, pp. 126-128, doi: 10.1109/ISSCC.2016.7417939
TABRIZ JOURNAL OF ELECTRICAL ENGINEERING
Volume 52, Issue 4 - Serial Number 102
December 2022
Pages 259-268

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