Implementation of TSTDP with a Parallel Synaptic Circuit Composed of Nanoparticle Memory-TFTs and Memristors

Document Type : Original Article

Authors

Faculty of Engineering, Razi University, Kermanshah, Iran

Abstract

Triplet-based Spike Timing Dependent Plasticity (TSTDP) is an advanced synaptic plasticity rule that results in improved learning capability compared to the conventional pair-based STDP (PSTDP). The TSTDP rule can reproduce the results of many electrophysiological experiments, where the PSTDP fails, and can be implemented using new nano-scale technologies. Nanocrystalline-silicon thin film transistors (TFT) and memristors are of these nano-scale devices which can be integrated into three-dimensions using low-temperature processing. This paper proposes a new hybrid TFT-memristive circuit that implements the TSTDP. The proposed circuit is designed using current/charge driven memristors and nanoparticle memory-TFTs, as the synapse. Our simulation results demonstrate that the proposed hybrid TFT-memristor circuit induces synaptic weight changes that arise due to the timing differences among pairs and triplets of spikes with a close match to realistic biological measurements. The presented memristive design is an initial step towards developing asynchronous TSTDP learning architectures using memristive devices. These architectures may facilitate the implementation of advanced large-scale neuromorphic systems with applications in real world engineering tasks such as pattern classification. be prepared in one or two paragraphs with less than 200 word and figures, tables, equations, and references should be avoided.

Keywords

References

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