طراحی و شبیه‌سازی یک تراشه 8 کاناله با توان مصرفی و سطح تراشه کم برای ارتباط با سیستم عصبی

نوع مقاله: علمی-پژوهشی

نویسندگان

1 دانشکده مهندسی برق - دانشگاه تربیت دبیر شهید رجایی

2 دانشکده مهندسی برق- دانشگاه صنعتی خواجه نصیرالدین طوسی

چکیده

محوریت این مقاله، طراحی یک تراشه 8 کاناله در تکنولوژی µm18/0 TSMC برای ارتباط با سیستم عصبی است که عمل ثبت و تحریک را به‌طور مجزا انجام می‌دهد. تقویت‌کننده سیگنال عصبی ارائه‌شده، مبتنی‌بر تکنیک فیدبک غیرمستقیم با قابلیت برنامه‌پذیری بهره ولتاژ، فرکانس قطع بالا و پایین بوده که با اتصال خازن کوچکی به خروجی آن، می‌توان به فرکانس قطع بالای موردنظر دست‌یافت. همچنین با استفاده از مدار تضعیف‌کننده در مسیر فیدبک، علاوه‌بر افزایش امپدانس ورودی، میزان خازن‌های موردنیاز در مدار نیز کاهش یافته‌است. سطح اشغالی 8 کانال تقویت‌کننده طراحی‌شده برابر با mm227/0 بوده، توان مصرفی هر کانال با منبع تغذیه V8/1 برابر با µW27 می‌باشد و با سوئینگ ولتاژ خروجی Vpp 95/0، مقدار THD برابر با kHz1dB@50- به‌دست آمده‌است. در پایانه تحریک ارائه‌شده نیز علاوه‌بر امکان تولید سیگنال‌های مربعی، امکان تولید سیگنال‌های نمایی با قابلیت برنامه‌پذیری ثابت زمانی، وجود دارد. طبقه خروجی این پایانه تحریک، شامل یک مدار ناقل جریان کلاس B برای انتقال جریان تحریک به بافت هدف در محدوده µA±96 به‌همراه مدارهای تزریق بار برای تأمین ولتاژهای V±3/3 موردنیاز، می‌باشد. مساحت یک کانال تحریک بدون مدارهای پمپ بار برابر با mm2043/0 می‌باشد و براساس شبیه‌سازی‌های انجام‌شده، هنگامی که این پایانه تحریک به مقاومت kΩ25 متصل می‌شود، با توان مصرفی حداکثر mW2/1، ویژگی‌های خواسته‌شده از آن را برآورده می‌شود.

کلیدواژه‌ها


عنوان مقاله [English]

Design and Simulation of a 8-Channel, Low-Power, and Small Chip-Area Neural Interfacing Chip

نویسندگان [English]

  • M. H Maghami 1
  • A. M Sodagar 2
1 Faculty of Electrical Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran
2 Electrical Engineering Department, K. N. Toosi University of Technology, Tehran, Iran
چکیده [English]

This article reports on the design of a 8-channel neural recording amplifier and stimulation back-end in TSMC 0.18µm technology which can do the recording and stimulating simultaneously. The design of proposed neural amplifier is based on indirect negative feedback and provides tunable lower cutoff frequency, and digitally-programmable upper cutoff frequency and voltage gain. Moreover, the proposed circuit employs attenuators in the same feedback loop in order to further reduce the silicon area consumed by the capacitors and at the same time to increase the input impedance of the circuit. The 8-channel designed circuit consumes 0.27mm2 of chip area and operated with a supply voltage of 1.8V, power consumption of each channel is 27µW with the THD of -50dB@1kHz and output voltage swing of 0.95Vpp < /sub>. The designed stimulation bak-end circuit, in addition to traditional rectangular pulse shapes, can generates biphasic stimulation pulses with exponential shapes, whose time constants are digitally programmable. A class-B second generation current conveyor is designed to be used for delivering stimulation current pulses of up to ±96µA to the target tissue and a charge pump block is in charge of the generating supply voltages of ±3.3V. The circuit consumes 0.043mm2 of silicon area for each channel (excluding charge pumps). Simulation results indicate that the stimuli generator meets expected requirements with the maximum power consumption of 1.2mW when connected to electrode-tissue impedance of as high as 25kΩ.

کلیدواژه‌ها [English]

  • Stimulation back-end
  • exponential current stimulation
  • indirect negative feedback
  • neural recording amplifiers
  • current conveyor circuits
[1] K. D. Wise, et al. “Microelectrodes, microelectronics, and implantable neural microsystems,” Proceedings of the IEEE, vol. 96, no. 7, pp. 1184-1202, 2008.
[2] F-G. Zeng, et al. “Cochlear implants: system design, integration, and evaluation,” IEEE Reviews in Biomedical Engineering, vol. 1, pp. 115-142, 2008.
[3] M. H. Maghami, et al., “Visual prostheses: the enabling technology to give sight to the blind,” Journal of Ophthalmic and Vision Research, vol. 9, no. 4, pp. 494-505, 2014.
[4] L. F. Nicolas-Alonso, and J. Gomez-Gil, “Brain computer interfaces, a review,” Sensors, vol. 12, no. 2, pp. 1211–1279, Jan. 2012.
[5] R. R. Harrison, “The design of integrated circuits to observe brain activity,” Proceedings of the IEEE, vol. 96, no. 7, pp. 1203–1216, 2008.
[6] E. Bahrami, and H. Shamsi, “A low-power low-noise logarithmic amplifier for bio-potential signal recording applications,” Tabriz Journal of Electrical Engineering, vol. 46, no. 3, pp. 73-81, autumn 2016.
[7] H. Rezaee-Dehsorkh, et al. “Analysis and design of tunable amplifiers for implantable neural recording applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 1, no.4, pp. 637-647, 2011.
[8] J. Simpson and M. Ghovanloo, “An experimental study of voltage, current, and charge controlled stimulation front-end circuitry,” in Proc. of IEEE International Symposium on Circuits and Systems, pp. 325–328, May 2007.
[9]  س. مرادی، ع. قاسمی، و ر. لطفی، "روشی جدید برای طراحی ریزتحریک کننده‌های عصبی ایمن،" مجله مهندسی برق دانشگاه تبریز، دوره 45، شماره 4، صص 179-190، زمستان 1394.
[10]  M. Sahin and Y. Tie, “Non-rectangular waveforms for neural stimulation with practical electrodes,” Journal of Neural Engineering, vol. 3, no. 3, pp. 227–233, 2007.
[11]  S. Ethier, and M. Sawan, “Exponential current pulse generation for efficient very high-impedance multisite stimulation,” IEEE Transactions on Biomedical Circuits and Systems, vol 5, no. 1, pp. 30-38, 2011.
[12]  M. Hasanuzzaman, R. Raut, and M. Sawan, “Energy-efficient high-voltage compliant implantable brain-machine interfaces,” in Proc. of IEEE Biomedical Circuits and Systems Conference, pp. 81-84, Oct. 2013.
[13]  M. H. Maghami, A. M. Sodagar and M. Sawan, “Biphasic, energy-efficient, current-controlled stimulation back-end for retinal visual prosthesis,” in Proc. of IEEE International Symposium on Circuits and Systems, pp. 241-244, May 2014.
[14]  Wongsarnpigoon, John P. Woock, and Warren M. Grill, “Efficiency analysis of waveform shape for electrical excitation of nerve fibers,” IEEE Transactions on Neural Systems and Rehabilitation Engineering, vol. 18, no. 3, pp. 319-328, 2010.
[15]  M. Haas, U. Bihr, J. Anders, and M. Ortmanns, “A bidirectional neural interface IC with high voltage compliance and spectral separation,” in Proc. of IEEE International Symposium on Circuits and Systems, pp.2743-2746, May 2016.
[16]  V. Nagaraj, et al., “Future of seizure prediction and intervention: closing the loop,” Journal of clinical neurophysiology, vol. 32, no. 3, pp. 194–206, Jun. 2015.
[17]  Beuter, et al., “Closed-loop cortical neuromodulation in parkinsons disease: An alternative to deep brain stimulation?,” Clinical Neurophysiology, vol. 125, no. 5, pp. 874–885, May 2015.
[18]  Williams, et al., “A 32-Ch. bidirectional neural/EMG interface with on-chip spike detection for sensorimotor feedback in Proc. of IEEE Biomedical Circuits and Systems Conference, pp.528-531, Oct. 2016.
[19]  M. Nekoui, A. M. Sodagar, and M. Ehsanian, “Area-efficient single-stage configuration for implantable neural recording amplifiers based on back attenuation,” in Proc. of IEEE Biomedical Circuits and Systems Conference, pp.396-399, Oct. 2014.
[20]  M. Sodagar, "Fully-integrated implementation of large time constant Gm-C integrators," Electronics Letters, vol. 43, no. 1, pp. 23-24, 2007.
[21]  خ. منفردی، و ی. بلقیس آذر، "تقویت‌کننده کسکود تمام‌تفاضلی بازیابی تاشده بهبودیافته ولتاژ و توان پایین" مجله مهندسی برق دانشگاه تبریز، دوره 48، شماره 1، صص 334-327، بهار 1397.‌
[22]  M. H. Maghami, A. M. Sodagar and M. Sawan, “Versatile stimulation back-end with programmable exponential current pulse shapes for a retinal visual prosthesis,” IEEE Transactions on Neural Systems and Rehabilitation Engineering, vol. 24, no. 11, pp. 1243-1253, 2016.
[23]  R. Pelliconi, et al. “Power efficient charge pump in deep submicron standard CMOS technology,” in Proc. of European Solid-State Circuits Conference, pp. 100–103, Sep. 2001.
[24]  خ. منفردی، "ناقل جریان نسل دوم کلاس AB مبتنی بر حلقه تراخطی با مقاومت ورودی بسیار پایین،" مجله مهندسی برق دانشگاه تبریز، دوره 47، شماره 4، صص 1711-1719، زمستان 1396.
[25]  M. H. Maghami, A. M. Sodagar and M. Sawan, “Analysis and design of a high-compliance ultra-high output resistance current mirror employing positive shunt feedback,” International Journal of Circuit Theory and Applications, vol. 43, no. 12, pp. 1935-1952, 2015.
[26]  S. J. Azhari, H. Faraji Baghtash, and K. Monfaredi, “A novel ultra-high compliance, high output impedance low power very accurate high performance current mirror," Microelectronics Journal, vol. 42, no. 2, pp. 432-439, 2011.
[27]  G. Ferri, et al., “A low-voltage CMOS 1-Hz low-pass filter,” in Proc. of the IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 1341-1343, Sep. 1999.
[28]  M. H. Maghami, and A.M. Sodagar, “Fully-integrated, large-time-constant, low-pass, Gm-C filter based on current conveyors,” in Proc. of the IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 281-284, Dec. 2011.
[29]  M. Sodagar, et al., “An implantable 64-channel wireless microsystem for single-unit neural recording,” IEEE Journal of Solid-State Circuits, vol. 44, no. 9, pp. 2591–2604, 2009.
[30]  R. R. Harrison, and C. Charles, “A low-power low-noise CMOS amplifier for neural recording applications,” IEEE Journal of Solid-State Circuits, vol. 38, no. 6, pp. 958–965, 2003.
[31]  M. Yin, and M. Ghovanloo, “A low-noise preamplifier with adjustable ain and bandwidth for biopotential recording applications,” in Proc. of IEEE International Symposium on Circuits and Systems, pp. 321–324, May 2007.
[32]  V. Majidzadeh, A. Schmid, and Y. Leblebici, “Energy efficient low-noise neural recording amplifier with enhanced noise efficiency factor,” IEEE Tranactions on Biomedical Circuits and Systems, vol. 5, no. 3, pp. 262–271, 2011.
[33]  S. Lee, et al., “An inductively powered scalable 32-channel wireless neural recording system-on-a-chip for neuroscience applications,” IEEE Transactions on Biomedical Circuits and Systems, vol. 4, no. 6, pp. 360–371, 2010.
[34]  W. Ngamkham, M. N. van Dongen, and W. A. Serdijn, “Biphasic stimulator circuit for a wide range of electrode-tissue impedance dedicated to cochlear implants,” in Proc. of IEEE International Symposium on Circuits and Systems, pp. 1083-1086, May 2012.
[35]  M. Ortmanns, A. Rocke, M. Gehrke, and H-J. Tiedtke, “A 232-channel epiretinal stimulator ASIC,” IEEE Journal of Solid-State Circuits, vol. 42, no. 12, pp. 2946–2959, 2007.
[36]  Md. Hasanuzzaman, et al. “Toward an energy-efficient high-voltage compliant visual intracortical multichannel stimulator,” IEEE Transactions on Very Large Scale Integration Systems, vol. 26, no. 5, pp. 878-891, 2018.